FPGA selection

The FPGA must have:

1. QFP packaging (as opposed to BGAs), as I want to solder it myself. On the other hand, I dont want it to be too easy (like a PLCC) - as I want to impress my audience. I have heard people saying FPGA's are not solderable. Lets cross that barrier!
   
2. the ability to handle high frequencies (~500MHz); (? - unconfirmed, as the dds has an internal ref_clk 20x multiplier; may be 25MHz operation is good enough ?)
3. must have 16 bits for the ADC data + 11 control bits on ADC + 16x2=32 data bits for digital input + 2 clock bits for digital input + 16 control bits for DDS + 40 bits for the Z8 = 117 I/O bits.

The Z8 will handle analog user inputs, communication with the PC, LCD display and amplitude attenuation. A user may want to change the baseband frequency at a resolution of 1Hz, going all the way upto 50MHz. So the micro should have a parellel interface with the FPGA (who's controllng the DDS) capable of carrying 50M₂ = 26 bits. To switch between analog and digital inputs, 1 bit. To switch amongst modulation schemes, 3 bits = (7 schemes). Safety overhead, another 10 bits.

The pin count is small enough to look at a small FPGA like the SPARTAN 3 from xilinx. I am having a look right now.